October 17th, 2014, 4:48 pm
Preview. Comments welcome.Quote2.3 Addressing ModesThe CPU has a number of different addressing modes. These are set in bit 23 and bit 24 of the instruction. A brief description of the addressing modes follows:2.3.1 ImmediateThis addressing mode is used when loading data into registers, or executing a relative jump.LDR A, #1234H ; Load Register A with the number 1234HEX (4660DEC)BNE #-1234 ; Relative Branch when the Not Equal flag is set by - 1234DEC i.e. subtract 1235 from the program counter This addressing mode will always expect there to be a second byte for the CPU to read to contain the additional information.2.3.2 RegisterThis addressing mode is used when only the register value is used, and hence the entire instruction is contained in a single word.ADD B, A ; Add the contents of register B to the contents of register ABNE A ; Execute a relative branch when the not equal flag is set 2.3.3 DirectThis addressing mode is used when the contents of the operands are a memory pointers rather than the contents of the memory.ADD A, &B ; Add the contents of the memory location pointed to by register B to the contents of register A and store in register A BNE &B ; Branch when the not equal flag is set to the memory location held in register B2.3.4 Direct OffsetUses the offset operand to adjust the from register pointed location. ADD C, &A, &B ; Add the memory contents pointed to by register A to the memory contents pointed to by B + C and store the result in the memory location pointed to by register ANote this mode can only be used when with the FROM register when it is in Direct mode (e.g. ADD C, &A, B is invalid, but ADD &C, &A, &B is valid)2.4 One Word Instructions ? Register Operations only2.4.1 NOP ? No OPerationThis command executed no operations on the CPU.2.4.2 RSR ? Return from SubroutineReturn from the sub routine by popping the Flag register from the stack and popping the PC register from the stack, setting the PC to the new value.2.4.3 - Deleted2.4.4 ADD ? ADD RegistersAdd two registers or the contents of memory locations pointed to by the registers together.Addressing Mode Instruction CommentRegister ADD A, B ; Add contents from Register B to Register ARegister, Direct ADD A, &B ; Add the contents of the memory location pointed to by Register B to Register ADirect ADD &A, &B ; Add the contents of memory location pointed to by register B to the contents pointed to by register A and store in the memory location pointed to by register AOffset Direct ADD C, A, &B ; Add the contents of Register C to Register B to get a new memory locationInvalid ADD C, &A, BADD &C, &A, B ; Invalid. This implies that B + some combination of C is added to memory location pointed at by register A ADD A, &12345 ; Invalid. Register addressing onlyOn Overflow the To Register (or memory location) will contain the From OR To and the CARRY Status flag will be set. 2.4.5 SUB ? Subtract RegistersSubtract two registers or the contents of two Registers or memory locations pointed to by the registers.2.4.6 MUL ? Multiply RegistersMultiply two registers or the contents of two Registers or memory locations pointed to by the registers.2.4.7 DIV ? Divide Divide two registers or the contents of two Registers or memory locations pointed to by the registers.2.4.8 MOD ? Modulos operation Take the modulus of two registers or the contents of two Registers or memory locations pointed to by the registers returning the modulus in the TO register or memory location.2.4.9 AND ? Bitwise AND Logical AND two registers or the contents of two Registers or memory locations pointed to by the registers.2.4.10 ORR ? Bitwise ORLogical OR two registers or the contents of two Registers or memory locations pointed to by the registers2.4.11 XOR? Bitwise XOR Logical Exclusive OR two registers or the contents of two Registers or memory locations pointed to by the registers.2.4.12 NOT ? Bitwise NOT NOT ALL registers or the contents of two Registers or memory locations pointed to by the registers.This instruction can only be used with a single FROM register operand.NOT A ; Bitwise flip of all bits in Register ANOT &A ; Bitwise flip of the memory address pointed to be register A2.4.13 ROL ? Rotate bits left Rotate Bits left in two Registers or memory locations pointed to by the registers by 1 bit.ROL AROL &A2.4.14 ROR ? Rotate bits right Rotate Bits right in two Registers or memory locations pointed to by the registers by 1 bit.ROR AROR &A2.4.15 PSH ? Push Register Push onto the stack the From register or memory locations pointed to by the register.PUSH APUSH &A2.4.16 POP ? Pop register Pop from the stack the to the From register or memory locations pointed to by the register.POP APOP &A2.4.17 CMP ? Compare contentsCompare the contents of the From and TO register or memory locations pointed to by the register and set the flags accordingly.2.5 Two Word Instructions2.5.1 Bxx ? Branch InstructionsBit 23 determines if the Branch instruction will be relative, or absolute.If the Register is set, then register addressing is used, if it is not set, then the CPU will read the next instruction from instruction memory and use that to execute the branch.Type of branch contained in bit 20 to bit 13.Example:BNE &1234 ; Branch to address &1234BNE #-124 ; Branch relative -124BNE #A ; Branch relative contents in Register ABNE &A ; Branch to relative addressBranch Flags:Bit Branch Name Description, when set0 N/A Reserved Not used1 BRC Carry An instruction requires a carry operation (i.e. the result is greater than can be held in a WORD)2 BDZ Divide by Zero Processor encounter a divide by zero exception3 BNE Not Equal Result of the instruction sets are not equal e.g. after comparing the contents of two registers4 BEQ Equal Result of the instruction sets the Equal flag e.g. after comparing the contents of two registers5 BGT Greater than Result of the instruction sets the Greater than flag e.g. after comparing the contents of two registers6 BLT Less than Result of the instruction sets the Less than flag e.g. after comparing the contents of two registers7 BOV Overflow Instruction returns result that is either greater than 32 bits or 31 bits signedAn extension will allow more than one condition to be tested at one time.2.5.2 LDR ? LoadLoad the contents either immediate value or memory location into the register from the data store memory.LDR A, #42 ; load 42 into register ALDR &A, #42 ; load 42 into the memory location pointed to by A2.5.3 STR ? Store Load the contents either immediate value or memory location into the register from the data store memory.STR A, B ; store register B into register ASTR A, B ; store register B into register ASTR &A, #42 ; Store 42 into the memory location pointed to by Register A2.5.4 JMP ? JumpJump to the location pointed by the register. Similar to the Branch instruction but can only be implemented through register and addressing mode. JMP A ; Jump to relative AJMP &A ; jump to the location pointed at by A2.5.5 JSR ? Jump SubroutineSimilar to JMP, but pushing the PC and FLAG onto the stack prior to changing the PC.2.5.6 MOV ? Move ContentsMOV A, B ; Move register contents B into register AMOV &A, B ; Move registers contests B into memeory location pointed at by AMOV A, &B ; Move register contents of memory location pointed at by B to register AMOV &A, &B ; Move contents of memory location pointed at by B to memory location pointed at by AMOV A, #42 ; Load #42 into register AMOV &A, #42 ; Load #42 into memory contents pointed at by AMOV A, B, C ; Not allowed as B is not a memory pointerMOV A,&B, C ;Store C into memory location pointed at by B + AMOV A, &B, #42 Store 42 into memory location pointed at by B + AMOV &12345, #42 ; illegal