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Posted: February 1st, 2012, 12:15 pm
Is there already a thread on this? I might be willing to contribute. But I am not really sure how, because I am not doing any trading right now that I think would be enhanced with faster processing.Any market where speed counts must have a lot of participants. So there are a lot of people needing the same thing (at which point I assume it will be required just to get back to even).If I did have a specific trading need, I am certain I would NOT be willing to contribute anyway. Maybe some of you people who do use it to trade can pay me not to contribute
Posted: February 1st, 2012, 10:22 pm
QuoteOriginally posted by: outrunOne specific FPGA application I once discussed (but never got around to) was a data feed and order handler. It would monitor an incoming raw exchange feed on the Ethernet data level for certain events (e.g. a spread getting negative) and if so directly send out a pre-assembled order message back to the exchange. This would all happen on the card, before the data gets assembled into TCP packets and transferred into the machine memory. It would be able to reduce processing latency to less than a nanosecond.I think this is very specific, it's probably easier is some HF club would hire you, right?An exchange feed, certain events, and a pre-assembled message, would have to be this exchange feed, these events, and this pre-assembled message. I could fill in the blanks, but the idea is to make a piece of code that would be useful to at least 20 different users. And no, it would not be easy if some broke losers tried to pay me for what could be as little as one day of work. I cannot even imagine the misery of trying to make a specific thing work for some benighted group of ogres.
Posted: February 1st, 2012, 10:35 pm
QuoteOriginally posted by: farmerAn exchange feed, certain events, and a pre-assembled message, would have to be this exchange feed, these events, and this pre-assembled message.So we need exchange-specific modules. We need libraries for different message types that fit into the same abstraction. In other words, reduce all types to a least common denominator. And we need a simple scripting language, with built-in variables, to describe the "events."And it needs to be written in an easily hackable way, since all these preconceived structures will disgust and paralyze the innovative user.And then we need a partnership with Altera or Xilinx.
Posted: February 2nd, 2012, 10:34 am
QuoteOriginally posted by: outruna large high-tech embedded systems builder who was willing to build any board that was neededWe are not trying to make a profit on a million of them. So I think we could do the fabrication ourselves.
Posted: February 2nd, 2012, 5:09 pm
QuoteOriginally posted by: outrunAnother thing we talked about was microwave straight line communication to shorten bits of internet routes.I am curious, what type of antenna were you considering, and what was the cost?I don't even know what kind of a tool you would use to debug a microwave protocol with maximum speed requirements and zero error tolerance. You would have to pay $17,000 just for something like this, and I don't believe that would get even close to the required spectrum.
Posted: February 3rd, 2012, 12:02 pm
QuoteOriginally posted by: outrunwith optical fiber 10ms, but theoretically 7ms with direct-of-line communication.Can you deploy a microwave network off-the-shelf with the desired characteristics? If not, that might be a fun one-size-fits-all tool to make. I don't think FPGA is going to save 3 ms over x86 correctly programmed.
Posted: February 3rd, 2012, 3:38 pm
QuoteThe Mankoff Company often has low latency based talks in London which are always filled to the brim with people trying to sell their products and expertiese for high frequency.Might be worth throwing an e-mail their way and get their attendance list or something like that.
Posted: February 4th, 2012, 7:27 pm
Maybe the best approach would be a pattern matching message lookup table. So you load the FPGA with a new lookup table 10 times a second. And if the incoming packets match X, you send back message Y. So all the logic the FPGA has to do is compare incoming packets to all members of a set of what, 200 bit masks? If the comparison comes positive, it fires back these other bytes.This design could be used in any number of diverse ways right out of the box. The only challenge might be making some kind of desktop interface for analyzing packets to write a program to generate the lookup table.
Posted: February 10th, 2012, 1:02 pm
I am going to hamcation in a couple hours. If I see some cheap used parts, I may pick up what I need to make a low-error radio network between Orlando and Miami. I am sure the geeks will have plenty of advice. But what would you be looking for if you were me?Here is the vendor list: